Module core::arch::wasm32

This is supported on WebAssembly only.

Platform-specific intrinsics for the wasm32 platform.

See the module documentation for more details.

Structs

v128	ExperimentalWebAssembly WASM-specific 128-bit wide SIMD vector type

Functions

memory_grow	WebAssembly Corresponding intrinsic to wasm's memory.grow instruction
memory_size	WebAssembly Corresponding intrinsic to wasm's memory.size instruction
atomic_notify⚠	ExperimentalWebAssembly Corresponding intrinsic to wasm's atomic.notify instruction
f32x4_splat	ExperimentalWebAssembly Create vector with identical lanes
f32x4_extract_lane⚠	ExperimentalWebAssembly Extract lane from a 128-bit vector interpreted as 4 packed f32 numbers.
f32x4_replace_lane⚠	ExperimentalWebAssembly Replace a lane from a 128-bit vector interpreted as 4 packed f32 numbers.
f32x4_eq	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
f32x4_ne	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
f32x4_lt	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
f32x4_gt	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
f32x4_le	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
f32x4_ge	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
f32x4_abs	ExperimentalWebAssembly Calculates the absolute value of each lane of a 128-bit vector interpreted as four 32-bit floating point numbers.
f32x4_neg	ExperimentalWebAssembly Negates each lane of a 128-bit vector interpreted as four 32-bit floating point numbers.
f32x4_sqrt	ExperimentalWebAssembly Calculates the square root of each lane of a 128-bit vector interpreted as four 32-bit floating point numbers.
f32x4_add	ExperimentalWebAssembly Adds pairwise lanes of two 128-bit vectors interpreted as four 32-bit floating point numbers.
f32x4_sub	ExperimentalWebAssembly Subtracts pairwise lanes of two 128-bit vectors interpreted as four 32-bit floating point numbers.
f32x4_mul	ExperimentalWebAssembly Multiplies pairwise lanes of two 128-bit vectors interpreted as four 32-bit floating point numbers.
f32x4_div	ExperimentalWebAssembly Divides pairwise lanes of two 128-bit vectors interpreted as four 32-bit floating point numbers.
f32x4_min	ExperimentalWebAssembly Calculates the minimum of pairwise lanes of two 128-bit vectors interpreted as four 32-bit floating point numbers.
f32x4_max	ExperimentalWebAssembly Calculates the maximum of pairwise lanes of two 128-bit vectors interpreted as four 32-bit floating point numbers.
f32x4_convert_s_i32x4	ExperimentalWebAssembly Converts a 128-bit vector interpreted as four 32-bit signed integers into a 128-bit vector of four 32-bit floating point numbers.
f32x4_convert_u_i32x4	ExperimentalWebAssembly Converts a 128-bit vector interpreted as four 32-bit unsigned integers into a 128-bit vector of four 32-bit floating point numbers.
f64x2_splat	ExperimentalWebAssembly Create vector with identical lanes
f64x2_extract_lane⚠	ExperimentalWebAssembly Extract lane from a 128-bit vector interpreted as 2 packed f64 numbers.
f64x2_replace_lane⚠	ExperimentalWebAssembly Replace a lane from a 128-bit vector interpreted as 2 packed f64 numbers.
f64x2_eq	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
f64x2_ne	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
f64x2_lt	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
f64x2_gt	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
f64x2_le	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
f64x2_ge	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
f64x2_abs	ExperimentalWebAssembly Calculates the absolute value of each lane of a 128-bit vector interpreted as two 64-bit floating point numbers.
f64x2_neg	ExperimentalWebAssembly Negates each lane of a 128-bit vector interpreted as two 64-bit floating point numbers.
f64x2_sqrt	ExperimentalWebAssembly Calculates the square root of each lane of a 128-bit vector interpreted as two 64-bit floating point numbers.
f64x2_add	ExperimentalWebAssembly Adds pairwise lanes of two 128-bit vectors interpreted as two 64-bit floating point numbers.
f64x2_sub	ExperimentalWebAssembly Subtracts pairwise lanes of two 128-bit vectors interpreted as two 64-bit floating point numbers.
f64x2_mul	ExperimentalWebAssembly Multiplies pairwise lanes of two 128-bit vectors interpreted as two 64-bit floating point numbers.
f64x2_div	ExperimentalWebAssembly Divides pairwise lanes of two 128-bit vectors interpreted as two 64-bit floating point numbers.
f64x2_min	ExperimentalWebAssembly Calculates the minimum of pairwise lanes of two 128-bit vectors interpreted as two 64-bit floating point numbers.
f64x2_max	ExperimentalWebAssembly Calculates the maximum of pairwise lanes of two 128-bit vectors interpreted as two 64-bit floating point numbers.
f64x2_convert_s_i64x2	ExperimentalWebAssembly Converts a 128-bit vector interpreted as two 64-bit signed integers into a 128-bit vector of two 64-bit floating point numbers.
f64x2_convert_u_i64x2	ExperimentalWebAssembly Converts a 128-bit vector interpreted as two 64-bit unsigned integers into a 128-bit vector of two 64-bit floating point numbers.
i32_atomic_wait⚠	ExperimentalWebAssembly Corresponding intrinsic to wasm's i32.atomic.wait instruction
i64_atomic_wait⚠	ExperimentalWebAssembly Corresponding intrinsic to wasm's i64.atomic.wait instruction
i16x8_splat	ExperimentalWebAssembly Create vector with identical lanes
i16x8_extract_lane⚠	ExperimentalWebAssembly Extract lane from a 128-bit vector interpreted as 8 packed i16 numbers.
i16x8_replace_lane⚠	ExperimentalWebAssembly Replace a lane from a 128-bit vector interpreted as 8 packed i16 numbers.
i16x8_eq	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit integers.
i16x8_ne	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit integers.
i16x8_lt_s	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit signed integers.
i16x8_lt_u	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit unsigned integers.
i16x8_gt_s	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit signed integers.
i16x8_gt_u	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit unsigned integers.
i16x8_le_s	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit signed integers.
i16x8_le_u	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit unsigned integers.
i16x8_ge_s	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit signed integers.
i16x8_ge_u	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit unsigned integers.
i16x8_neg	ExperimentalWebAssembly Negates a 128-bit vectors intepreted as eight 16-bit signed integers
i16x8_any_true	ExperimentalWebAssembly Returns 1 if any lane is nonzero or 0 if all lanes are zero.
i16x8_all_true	ExperimentalWebAssembly Returns 1 if all lanes are nonzero or 0 if any lane is nonzero.
i16x8_shl	ExperimentalWebAssembly Shifts each lane to the left by the specified number of bits.
i16x8_shr_s	ExperimentalWebAssembly Shifts each lane to the right by the specified number of bits, sign extending.
i16x8_shr_u	ExperimentalWebAssembly Shifts each lane to the right by the specified number of bits, shifting in zeros.
i16x8_add	ExperimentalWebAssembly Adds two 128-bit vectors as if they were two packed eight 16-bit integers.
i16x8_add_saturate_s	ExperimentalWebAssembly Adds two 128-bit vectors as if they were two packed eight 16-bit signed integers, saturating on overflow to i16::max_value().
i16x8_add_saturate_u	ExperimentalWebAssembly Adds two 128-bit vectors as if they were two packed eight 16-bit unsigned integers, saturating on overflow to u16::max_value().
i16x8_sub	ExperimentalWebAssembly Subtracts two 128-bit vectors as if they were two packed eight 16-bit integers.
i16x8_sub_saturate_s	ExperimentalWebAssembly Subtracts two 128-bit vectors as if they were two packed eight 16-bit signed integers, saturating on overflow to i16::min_value().
i16x8_sub_saturate_u	ExperimentalWebAssembly Subtracts two 128-bit vectors as if they were two packed eight 16-bit unsigned integers, saturating on overflow to 0.
i16x8_mul	ExperimentalWebAssembly Multiplies two 128-bit vectors as if they were two packed eight 16-bit signed integers.
i32x4_splat	ExperimentalWebAssembly Create vector with identical lanes
i32x4_extract_lane⚠	ExperimentalWebAssembly Extract lane from a 128-bit vector interpreted as 4 packed i32 numbers.
i32x4_replace_lane⚠	ExperimentalWebAssembly Replace a lane from a 128-bit vector interpreted as 4 packed i32 numbers.
i32x4_eq	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit integers.
i32x4_ne	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit integers.
i32x4_lt_s	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit signed integers.
i32x4_lt_u	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit unsigned integers.
i32x4_gt_s	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit signed integers.
i32x4_gt_u	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit unsigned integers.
i32x4_le_s	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit signed integers.
i32x4_le_u	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit unsigned integers.
i32x4_ge_s	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit signed integers.
i32x4_ge_u	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit unsigned integers.
i32x4_neg	ExperimentalWebAssembly Negates a 128-bit vectors intepreted as four 32-bit signed integers
i32x4_any_true	ExperimentalWebAssembly Returns 1 if any lane is nonzero or 0 if all lanes are zero.
i32x4_all_true	ExperimentalWebAssembly Returns 1 if all lanes are nonzero or 0 if any lane is nonzero.
i32x4_shl	ExperimentalWebAssembly Shifts each lane to the left by the specified number of bits.
i32x4_shr_s	ExperimentalWebAssembly Shifts each lane to the right by the specified number of bits, sign extending.
i32x4_shr_u	ExperimentalWebAssembly Shifts each lane to the right by the specified number of bits, shifting in zeros.
i32x4_add	ExperimentalWebAssembly Adds two 128-bit vectors as if they were two packed four 32-bit integers.
i32x4_sub	ExperimentalWebAssembly Subtracts two 128-bit vectors as if they were two packed four 32-bit integers.
i32x4_mul	ExperimentalWebAssembly Multiplies two 128-bit vectors as if they were two packed four 32-bit signed integers.
i32x4_trunc_s_f32x4_sat	ExperimentalWebAssembly Converts a 128-bit vector interpreted as four 32-bit floating point numbers into a 128-bit vector of four 32-bit signed integers.
i32x4_trunc_u_f32x4_sat	ExperimentalWebAssembly Converts a 128-bit vector interpreted as four 32-bit floating point numbers into a 128-bit vector of four 32-bit unsigned integers.
i64x2_splat	ExperimentalWebAssembly Create vector with identical lanes
i64x2_extract_lane⚠	ExperimentalWebAssembly Extract lane from a 128-bit vector interpreted as 2 packed i64 numbers.
i64x2_replace_lane⚠	ExperimentalWebAssembly Replace a lane from a 128-bit vector interpreted as 2 packed i64 numbers.
i64x2_neg	ExperimentalWebAssembly Negates a 128-bit vectors intepreted as two 64-bit signed integers
i64x2_any_true	ExperimentalWebAssembly Returns 1 if any lane is nonzero or 0 if all lanes are zero.
i64x2_all_true	ExperimentalWebAssembly Returns 1 if all lanes are nonzero or 0 if any lane is nonzero.
i64x2_shl	ExperimentalWebAssembly Shifts each lane to the left by the specified number of bits.
i64x2_shr_s	ExperimentalWebAssembly Shifts each lane to the right by the specified number of bits, sign extending.
i64x2_shr_u	ExperimentalWebAssembly Shifts each lane to the right by the specified number of bits, shifting in zeros.
i64x2_add	ExperimentalWebAssembly Adds two 128-bit vectors as if they were two packed two 64-bit integers.
i64x2_sub	ExperimentalWebAssembly Subtracts two 128-bit vectors as if they were two packed two 64-bit integers.
i64x2_trunc_s_f64x2_sat	ExperimentalWebAssembly Converts a 128-bit vector interpreted as two 64-bit floating point numbers into a 128-bit vector of two 64-bit signed integers.
i64x2_trunc_u_f64x2_sat	ExperimentalWebAssembly Converts a 128-bit vector interpreted as two 64-bit floating point numbers into a 128-bit vector of two 64-bit unsigned integers.
i8x16_splat	ExperimentalWebAssembly Create vector with identical lanes
i8x16_extract_lane⚠	ExperimentalWebAssembly Extract lane from a 128-bit vector interpreted as 16 packed i8 numbers.
i8x16_replace_lane⚠	ExperimentalWebAssembly Replace a lane from a 128-bit vector interpreted as 16 packed i8 numbers.
i8x16_eq	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 16 eight-bit integers.
i8x16_ne	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 16 eight-bit integers.
i8x16_lt_s	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 16 eight-bit signed integers.
i8x16_lt_u	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 16 eight-bit unsigned integers.
i8x16_gt_s	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 16 eight-bit signed integers.
i8x16_gt_u	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 16 eight-bit unsigned integers.
i8x16_le_s	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 16 eight-bit signed integers.
i8x16_le_u	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 16 eight-bit unsigned integers.
i8x16_ge_s	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 16 eight-bit signed integers.
i8x16_ge_u	ExperimentalWebAssembly Compares two 128-bit vectors as if they were two vectors of 16 eight-bit unsigned integers.
i8x16_neg	ExperimentalWebAssembly Negates a 128-bit vectors intepreted as sixteen 8-bit signed integers
i8x16_any_true	ExperimentalWebAssembly Returns 1 if any lane is nonzero or 0 if all lanes are zero.
i8x16_all_true	ExperimentalWebAssembly Returns 1 if all lanes are nonzero or 0 if any lane is nonzero.
i8x16_shl	ExperimentalWebAssembly Shifts each lane to the left by the specified number of bits.
i8x16_shr_s	ExperimentalWebAssembly Shifts each lane to the right by the specified number of bits, sign extending.
i8x16_shr_u	ExperimentalWebAssembly Shifts each lane to the right by the specified number of bits, shifting in zeros.
i8x16_add	ExperimentalWebAssembly Adds two 128-bit vectors as if they were two packed sixteen 8-bit integers.
i8x16_add_saturate_s	ExperimentalWebAssembly Adds two 128-bit vectors as if they were two packed sixteen 8-bit signed integers, saturating on overflow to i8::max_value().
i8x16_add_saturate_u	ExperimentalWebAssembly Adds two 128-bit vectors as if they were two packed sixteen 8-bit unsigned integers, saturating on overflow to u8::max_value().
i8x16_sub	ExperimentalWebAssembly Subtracts two 128-bit vectors as if they were two packed sixteen 8-bit integers.
i8x16_sub_saturate_s	ExperimentalWebAssembly Subtracts two 128-bit vectors as if they were two packed sixteen 8-bit signed integers, saturating on overflow to i8::min_value().
i8x16_sub_saturate_u	ExperimentalWebAssembly Subtracts two 128-bit vectors as if they were two packed sixteen 8-bit unsigned integers, saturating on overflow to 0.
i8x16_mul	ExperimentalWebAssembly Multiplies two 128-bit vectors as if they were two packed sixteen 8-bit signed integers.
unreachable⚠	ExperimentalWebAssembly Generates the trap instruction UNREACHABLE
v128_load⚠	ExperimentalWebAssembly Load a v128 vector from the given heap address.
v128_store⚠	ExperimentalWebAssembly Store a v128 vector to the given heap address.
v128_const	ExperimentalWebAssembly Materialize a constant SIMD value from the immediate operands.
v128_not	ExperimentalWebAssembly Flips each bit of the 128-bit input vector.
v128_and	ExperimentalWebAssembly Performs a bitwise and of the two input 128-bit vectors, returning the resulting vector.
v128_or	ExperimentalWebAssembly Performs a bitwise or of the two input 128-bit vectors, returning the resulting vector.
v128_xor	ExperimentalWebAssembly Performs a bitwise xor of the two input 128-bit vectors, returning the resulting vector.
v128_bitselect	ExperimentalWebAssembly Use the bitmask in c to select bits from v1 when 1 and v2 when 0.