FFmpeg  4.0
vp8_idct_msa.c
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1 /*
2  * Copyright (c) 2015 Manojkumar Bhosale (Manojkumar.Bhosale@imgtec.com)
3  *
4  * This file is part of FFmpeg.
5  *
6  * FFmpeg is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU Lesser General Public
8  * License as published by the Free Software Foundation; either
9  * version 2.1 of the License, or (at your option) any later version.
10  *
11  * FFmpeg is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14  * Lesser General Public License for more details.
15  *
16  * You should have received a copy of the GNU Lesser General Public
17  * License along with FFmpeg; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
19  */
20 
21 #include <string.h>
22 #include "libavcodec/vp8dsp.h"
24 #include "vp8dsp_mips.h"
25 
26 static const int cospi8sqrt2minus1 = 20091;
27 static const int sinpi8sqrt2 = 35468;
28 
29 #define VP8_IDCT_1D_W(in0, in1, in2, in3, out0, out1, out2, out3) \
30 { \
31  v4i32 a1_m, b1_m, c1_m, d1_m; \
32  v4i32 c_tmp1_m, c_tmp2_m, d_tmp1_m, d_tmp2_m; \
33  v4i32 const_cospi8sqrt2minus1_m, sinpi8_sqrt2_m; \
34  \
35  const_cospi8sqrt2minus1_m = __msa_fill_w(cospi8sqrt2minus1); \
36  sinpi8_sqrt2_m = __msa_fill_w(sinpi8sqrt2); \
37  a1_m = in0 + in2; \
38  b1_m = in0 - in2; \
39  c_tmp1_m = ((in1) * sinpi8_sqrt2_m) >> 16; \
40  c_tmp2_m = in3 + (((in3) * const_cospi8sqrt2minus1_m) >> 16); \
41  c1_m = c_tmp1_m - c_tmp2_m; \
42  d_tmp1_m = (in1) + (((in1) * const_cospi8sqrt2minus1_m) >> 16); \
43  d_tmp2_m = ((in3) * sinpi8_sqrt2_m) >> 16; \
44  d1_m = d_tmp1_m + d_tmp2_m; \
45  BUTTERFLY_4(a1_m, b1_m, c1_m, d1_m, out0, out1, out2, out3); \
46 }
47 
48 void ff_vp8_idct_add_msa(uint8_t *dst, int16_t input[16], ptrdiff_t stride)
49 {
50  v8i16 input0, input1;
51  v4i32 in0, in1, in2, in3, hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3;
52  v4i32 res0, res1, res2, res3;
53  v16i8 zero = { 0 };
54  v16i8 pred0, pred1, pred2, pred3, dest0, dest1;
55  v16i8 mask = { 0, 4, 8, 12, 16, 20, 24, 28, 0, 0, 0, 0, 0, 0, 0, 0 };
56 
57  /* load short vector elements of 4x4 block */
58  LD_SH2(input, 8, input0, input1);
59  UNPCK_SH_SW(input0, in0, in1);
60  UNPCK_SH_SW(input1, in2, in3);
61  VP8_IDCT_1D_W(in0, in1, in2, in3, hz0, hz1, hz2, hz3);
62  /* transpose the block */
63  TRANSPOSE4x4_SW_SW(hz0, hz1, hz2, hz3, hz0, hz1, hz2, hz3);
64  VP8_IDCT_1D_W(hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3);
65  SRARI_W4_SW(vt0, vt1, vt2, vt3, 3);
66  /* transpose the block */
67  TRANSPOSE4x4_SW_SW(vt0, vt1, vt2, vt3, vt0, vt1, vt2, vt3);
68  LD_SB4(dst, stride, pred0, pred1, pred2, pred3);
69  ILVR_B4_SW(zero, pred0, zero, pred1, zero, pred2, zero, pred3,
70  res0, res1, res2, res3);
71  ILVR_H4_SW(zero, res0, zero, res1, zero, res2, zero, res3,
72  res0, res1, res2, res3);
73  ADD4(res0, vt0, res1, vt1, res2, vt2, res3, vt3, res0, res1, res2, res3);
74  res0 = CLIP_SW_0_255(res0);
75  res1 = CLIP_SW_0_255(res1);
76  res2 = CLIP_SW_0_255(res2);
77  res3 = CLIP_SW_0_255(res3);
78  VSHF_B2_SB(res0, res1, res2, res3, mask, mask, dest0, dest1);
79  ST4x4_UB(dest0, dest1, 0, 1, 0, 1, dst, stride);
80 
81  memset(input, 0, 4 * 4 * sizeof(*input));
82 }
83 
84 void ff_vp8_idct_dc_add_msa(uint8_t *dst, int16_t in_dc[16], ptrdiff_t stride)
85 {
86  v8i16 vec;
87  v8i16 res0, res1, res2, res3;
88  v16i8 zero = { 0 };
89  v16i8 pred0, pred1, pred2, pred3, dest0, dest1;
90  v16i8 mask = { 0, 2, 4, 6, 16, 18, 20, 22, 0, 0, 0, 0, 0, 0, 0, 0 };
91 
92  vec = __msa_fill_h(in_dc[0]);
93  vec = __msa_srari_h(vec, 3);
94  LD_SB4(dst, stride, pred0, pred1, pred2, pred3);
95  ILVR_B4_SH(zero, pred0, zero, pred1, zero, pred2, zero, pred3,
96  res0, res1, res2, res3);
97  ADD4(res0, vec, res1, vec, res2, vec, res3, vec, res0, res1, res2, res3);
98  CLIP_SH4_0_255(res0, res1, res2, res3);
99  VSHF_B2_SB(res0, res1, res2, res3, mask, mask, dest0, dest1);
100  ST4x4_UB(dest0, dest1, 0, 1, 0, 1, dst, stride);
101 
102  in_dc[0] = 0;
103 }
104 
105 void ff_vp8_luma_dc_wht_msa(int16_t block[4][4][16], int16_t input[16])
106 {
107  int16_t *mb_dq_coeff = &block[0][0][0];
108  v8i16 input0, input1;
109  v4i32 in0, in1, in2, in3, a1, b1, c1, d1;
110  v4i32 hz0, hz1, hz2, hz3, vt0, vt1, vt2, vt3;
111 
112  /* load short vector elements of 4x4 block */
113  LD_SH2(input, 8, input0, input1);
114  UNPCK_SH_SW(input0, in0, in1);
115  UNPCK_SH_SW(input1, in2, in3);
116  BUTTERFLY_4(in0, in1, in2, in3, a1, b1, c1, d1);
117  BUTTERFLY_4(a1, d1, c1, b1, hz0, hz1, hz3, hz2);
118  /* transpose the block */
119  TRANSPOSE4x4_SW_SW(hz0, hz1, hz2, hz3, hz0, hz1, hz2, hz3);
120  BUTTERFLY_4(hz0, hz1, hz2, hz3, a1, b1, c1, d1);
121  BUTTERFLY_4(a1, d1, c1, b1, vt0, vt1, vt3, vt2);
122  ADD4(vt0, 3, vt1, 3, vt2, 3, vt3, 3, vt0, vt1, vt2, vt3);
123  SRA_4V(vt0, vt1, vt2, vt3, 3);
124  mb_dq_coeff[0] = __msa_copy_s_h((v8i16) vt0, 0);
125  mb_dq_coeff[16] = __msa_copy_s_h((v8i16) vt1, 0);
126  mb_dq_coeff[32] = __msa_copy_s_h((v8i16) vt2, 0);
127  mb_dq_coeff[48] = __msa_copy_s_h((v8i16) vt3, 0);
128  mb_dq_coeff[64] = __msa_copy_s_h((v8i16) vt0, 2);
129  mb_dq_coeff[80] = __msa_copy_s_h((v8i16) vt1, 2);
130  mb_dq_coeff[96] = __msa_copy_s_h((v8i16) vt2, 2);
131  mb_dq_coeff[112] = __msa_copy_s_h((v8i16) vt3, 2);
132  mb_dq_coeff[128] = __msa_copy_s_h((v8i16) vt0, 4);
133  mb_dq_coeff[144] = __msa_copy_s_h((v8i16) vt1, 4);
134  mb_dq_coeff[160] = __msa_copy_s_h((v8i16) vt2, 4);
135  mb_dq_coeff[176] = __msa_copy_s_h((v8i16) vt3, 4);
136  mb_dq_coeff[192] = __msa_copy_s_h((v8i16) vt0, 6);
137  mb_dq_coeff[208] = __msa_copy_s_h((v8i16) vt1, 6);
138  mb_dq_coeff[224] = __msa_copy_s_h((v8i16) vt2, 6);
139  mb_dq_coeff[240] = __msa_copy_s_h((v8i16) vt3, 6);
140 
141  memset(input, 0, 4 * 4 * sizeof(int16_t));
142 }
143 
144 void ff_vp8_idct_dc_add4y_msa(uint8_t *dst, int16_t block[4][16],
145  ptrdiff_t stride)
146 {
147  ff_vp8_idct_dc_add_msa(dst, &block[0][0], stride);
148  ff_vp8_idct_dc_add_msa(dst + 4, &block[1][0], stride);
149  ff_vp8_idct_dc_add_msa(dst + 8, &block[2][0], stride);
150  ff_vp8_idct_dc_add_msa(dst + 12, &block[3][0], stride);
151 }
152 
153 void ff_vp8_idct_dc_add4uv_msa(uint8_t *dst, int16_t block[4][16],
154  ptrdiff_t stride)
155 {
156  ff_vp8_idct_dc_add_msa(dst, &block[0][0], stride);
157  ff_vp8_idct_dc_add_msa(dst + 4, &block[1][0], stride);
158  ff_vp8_idct_dc_add_msa(dst + stride * 4, &block[2][0], stride);
159  ff_vp8_idct_dc_add_msa(dst + stride * 4 + 4, &block[3][0], stride);
160 }
static const int sinpi8sqrt2
Definition: vp8_idct_msa.c:27
#define VP8_IDCT_1D_W(in0, in1, in2, in3, out0, out1, out2, out3)
Definition: vp8_idct_msa.c:29
#define SRARI_W4_SW(...)
#define a1
Definition: regdef.h:47
int stride
Definition: mace.c:144
#define ST4x4_UB(in0, in1, idx0, idx1, idx2, idx3, pdst, stride)
#define TRANSPOSE4x4_SW_SW(in0, in1, in2, in3, out0, out1, out2, out3)
static int16_t block[64]
Definition: dct.c:115
#define VSHF_B2_SB(...)
#define SRA_4V(in0, in1, in2, in3, shift)
void ff_vp8_idct_dc_add4y_msa(uint8_t *dst, int16_t block[4][16], ptrdiff_t stride)
Definition: vp8_idct_msa.c:144
uint8_t
VP8 compatible video decoder.
#define CLIP_SW_0_255(in)
static const uint64_t c1
Definition: murmur3.c:49
#define BUTTERFLY_4(in0, in1, in2, in3, out0, out1, out2, out3)
#define ADD4(in0, in1, in2, in3, in4, in5, in6, in7, out0, out1, out2, out3)
static const uint16_t mask[17]
Definition: lzw.c:38
#define zero
Definition: regdef.h:64
#define CLIP_SH4_0_255(in0, in1, in2, in3)
#define LD_SH2(...)
#define LD_SB4(...)
static const int cospi8sqrt2minus1
Definition: vp8_idct_msa.c:26
#define ILVR_H4_SW(...)
#define UNPCK_SH_SW(in, out0, out1)
#define ILVR_B4_SW(...)
#define ILVR_B4_SH(...)
void ff_vp8_idct_add_msa(uint8_t *dst, int16_t input[16], ptrdiff_t stride)
Definition: vp8_idct_msa.c:48
void ff_vp8_luma_dc_wht_msa(int16_t block[4][4][16], int16_t input[16])
Definition: vp8_idct_msa.c:105
void ff_vp8_idct_dc_add4uv_msa(uint8_t *dst, int16_t block[4][16], ptrdiff_t stride)
Definition: vp8_idct_msa.c:153
void ff_vp8_idct_dc_add_msa(uint8_t *dst, int16_t in_dc[16], ptrdiff_t stride)
Definition: vp8_idct_msa.c:84